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| TMS320C6713头文件源代码 | |||||
作者：Free 文章来源：Free 点击数： 更新时间：2008-1-2  |
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#define EMIF_GBLCTL (*((unsigned int *)0x01800000)) /* Address of EMIF global control */ #define EMIF_CE1CTL (*((unsigned int *)0x01800004)) /* Address of EMIF CE1 control */ #define EMIF_CE0CTL (*((unsigned int *)0x01800008)) /* Address of EMIF CE0 control */ #define EMIF_CE2CTL (*((unsigned int *)0x01800010)) /* Address of EMIF CE2 control */ #define EMIF_CE3CTL (*((unsigned int *)0x01800014)) /* Address of EMIF CE3 control */ #define EMIF_SDCTRL (*((unsigned int *)0x01800018)) /* Address of EMIF SDRAM control */ #define EMIF_SDTIM (*((unsigned int *)0x0180001C)) /* Address of EMIF SDRAM refresh control*/ #define EMIF_SDEXT (*((unsigned int *)0x01800020)) /* Address of EMIF SDRAM extension control*/ #define EMIF_CCFG (*((unsigned int *)0x01840000)) /* Define McBSP0 Registers */ #define McBSP0_DRR 0x18c0000 /* Address of data receive reg. */ #define McBSP0_DXR 0x18c0004 /* Address of data transmit reg. */ #define McBSP0_SPCR 0x18c0008 /* Address of serial port contl. reg. */ #define McBSP0_RCR 0x18c000C /* Address of receive control reg. */ #define McBSP0_XCR 0x18c0010 /* Address of transmit control reg. */ #define McBSP0_SRGR 0x18c0014 /* Address of sample rate generator */ #define McBSP0_MCR 0x18c0018 /* Address of multichannel reg. */ #define McBSP0_RCER 0x18c001C /* Address of receive channel enable. */ #define McBSP0_XCER 0x18c0020 /* Address of transmit channel enable. */ #define McBSP0_PCR 0x18c0024 /* Address of pin control reg. */ /* Define McBSP1 Registers */ #define McBSP1_DRR 0x1900000 /* Address of data receive reg. */ #define McBSP1_DXR 0x1900004 /* Address of data transmit reg. */ #define McBSP1_SPCR 0x1900008 /* Address of serial port contl. reg. */ #define McBSP1_RCR 0x190000C /* Address of receive control reg. */ #define McBSP1_XCR 0x1900010 /* Address of transmit control reg. */ #define McBSP1_SRGR 0x1900014 /* Address of sample rate generator */ #define McBSP1_MCR 0x1900018 /* Address of multichannel reg. */ #define McBSP1_RCER 0x190001C /* Address of receive channel enable. */ #define McBSP1_XCER 0x1900020 /* Address of transmit channel enable. */ #define McBSP1_PCR 0x1900024 /* Address of pin control reg. */ /* Define L2 Cache Registers */ #define L2CFG 0x1840000 /* Address of L2 config reg */ #define MAR0 0x1848200 /* Address of mem attribute reg */ /* Define Interrupt Registers */ #define IMH 0x19c0000 /* Address of Interrupt Multiplexer High*/ #define IML 0x19c0004 /* Address of Interrupt Multiplexer Low */ /* Define Timer0 Registers */ #define TIMER0_CTRL 0x1940000 /* Address of timer0 control reg. */ #define TIMER0_PRD 0x1940004 /* Address of timer0 period reg. */ #define TIMER0_COUNT 0x1940008 /* Address of timer0 counter reg. */ /* Define Timer1 Registers */ #define TIMER1_CTRL 0x1980000 /* Address of timer1 control reg. */ #define TIMER1_PRD 0x1980004 /* Address of timer1 period reg. */ #define TIMER1_COUNT 0x1980008 /* Address of timer1 counter reg. */ /* Define EDMA Registers */ #define PQSR 0x01A0FFE0 /* Address of priority queue status */ #define CIPR 0x01A0FFE4 /* Address of channel interrupt pending */ #define CIER 0x01A0FFE8 /* Address of channel interrupt enable */ #define CCER 0x01A0FFEC /* Address of channel chain enable */ #define ER 0x01A0FFF0 /* Address of event register */ #define EER 0x01A0FFF4 /* Address of event enable register */ #define ECR 0x01A0FFF8 /* Address of event clear register */ #define ESR 0x01A0FFFC /* Address of event set register */ /* Define EDMA Transfer Parameter Entry Fields */ #define OPT 0*4 /* Options Parameter */ #define SRC 1*4 /* SRC Address Parameter */ #define CNT 2*4 /* Count Parameter */ #define DST 3*4 /* DST Address Parameter */ #define IDX 4*4 /* IDX Parameter */ #define LNK 5*4 /* LNK Parameter */ /* Define EDMA Parameter RAM Addresses */ #define EVENT0_PARAMS 0x01A00000 #define EVENT1_PARAMS EVENT0_PARAMS + 0x18 #define EVENT2_PARAMS EVENT1_PARAMS + 0x18 #define EVENT3_PARAMS EVENT2_PARAMS + 0x18 #define EVENT4_PARAMS EVENT3_PARAMS + 0x18 #define EVENT5_PARAMS EVENT4_PARAMS + 0x18 #define EVENT6_PARAMS EVENT5_PARAMS + 0x18 #define EVENT7_PARAMS EVENT6_PARAMS + 0x18 #define EVENT8_PARAMS EVENT7_PARAMS + 0x18 #define EVENT9_PARAMS EVENT8_PARAMS + 0x18 #define EVENTA_PARAMS EVENT9_PARAMS + 0x18 #define EVENTB_PARAMS EVENTA_PARAMS + 0x18 #define EVENTC_PARAMS EVENTB_PARAMS + 0x18 #define EVENTD_PARAMS EVENTC_PARAMS + 0x18 #define EVENTE_PARAMS EVENTD_PARAMS + 0x18 #define EVENTF_PARAMS EVENTE_PARAMS + 0x18 #define EVENTN_PARAMS EVENTF_PARAMS + 0x18 #define EVENTO_PARAMS EVENTN_PARAMS + 0x18 /* Define QDMA Memory Mapped Registers */ #define QDMA_OPT 0x02000000 /* Address of QDMA options register */ #define QDMA_SRC 0x02000004 /* Address of QDMA SRC address register */ #define QDMA_CNT 0x02000008 /* Address of QDMA counts register */ #define QDMA_DST 0x0200000C /* Address of QDMA DST address register */ #define QDMA_IDX 0x02000010 /* Address of QDMA index register */ /* Define QDMA Pseudo Registers */ #define QDMA_S_OPT 0x02000020 /* Address of QDMA options register */ #define QDMA_S_SRC 0x02000024 /* Address of QDMA SRC address register */ #define QDMA_S_CNT 0x02000028 /* Address of QDMA counts register */ #define QDMA_S_DST 0x0200002C /* Address of QDMA DST address register */ #define QDMA_S_IDX 0x02000030 /* Address of QDMA index register */ /* Definitions for the DSK Board and SW */ //////////////////////////////////////////////// //操作扩展中断 //操作16C550 #define UART_BASE_ADDR 0xA0000000 #define OFFSET 0X00000400 #define RBR_16C550 *((int*)(UART_BASE_ADDR+0*OFFSET)) #define THR_16C550 *((int*)(UART_BASE_ADDR+0*OFFSET)) #define IER_16C550 *((int*)(UART_BASE_ADDR+1*OFFSET)) #define IIR_16C550 *((int*)(UART_BASE_ADDR+2*OFFSET)) #define FCR_16C550 *((int*)(UART_BASE_ADDR+2*OFFSET)) #define LCR_16C550 *((int*)(UART_BASE_ADDR+3*OFFSET)) #define MCR_16C550 *((int*)(UART_BASE_ADDR+4*OFFSET)) #define LSR_16C550 *((int*)(UART_BASE_ADDR+5*OFFSET)) #define MSR_16C550 *((int*)(UART_BASE_ADDR+6*OFFSET)) #define SCR_16C550 *((int*)(UART_BASE_ADDR+7*OFFSET)) #define DLL_16C550 *((int*)(UART_BASE_ADDR+0*OFFSET)) #define DLM_16C550 *((int*)(UART_BASE_ADDR+1*OFFSET)) #define Reset16C550 *((int*)0X90080000)=0X00;Wait(100);*((int*)NULL_ADDRESS)=0x00 #define SEND_CHAR(SendChar) while(1){if((LSR_16C550&0x20)!=0x00)break;}THR_16C550=SendChar ///////////////////////////////////////////////// //6711寄存器 #define EXTPOL *(int*)0x019C0008 //External Interrupt Polarity Register #define MUXL *(int*)0x019C0004 //Interrupt Selector Registers #define MUXH *(int*)0x019C0004 //Interrupt Selector Registers /////////////////////////////////////////////////// //命令匹配 #define RX_DATA 0x00 //正在接收数据 #define MATCHING 0x01 //命令正在匹配 #define MATCHED 0x02 //命令已经匹配 ///////////////////////////////////////////////////// //状态字 #define YES 0x55 // !YES=NO #define NO 0xaa // ///////////////////////////////////////////////////// //状态字 #define VALID 0x55 // !VALID=INVALID #define INVALID 0xaa // ////////////////////////////////////////////////////// //可调参数 #define MAX_COMMAND_NUM 5 //命令匹配时最多需要匹配的命令 #define MATRIX_DEM 5 //进行QR分解的矩阵的维数 ////////////////////////////////////////////////////// //空地之 #define NULL_ADDRESS 0xAFFF0000 //FPGA的空地址 //////////////////////////////////////////////////////////// //中断开关 #define ENABLE_ALL CSR|=1 //开全局中断 #define DISABLE_ALL CSR&=0 //关全局中断 //////////////////////////////////////////////////////////// //通用IO #define WDI *((int*)0X90050000)=0x00 //看门购输入脉冲 #define RS485_RECEIVE *((int*)0X90010000)=0x00 //485接收数据 #define RS485_TRANSMIT *((int*)0X90020000)=0x00 //485发送数据 #define CAPMODE160128 *((int*)0X90030000)=0x00 //视频模块图像格式160*128 #define CAPMODE320240 *((int*)0X90040000)=0x00 //视频模块图像格式320*240 #define EX_LATCH2_HIGH *((int*)0X90090000)=0x00 //扩展IO 2 置低 #define EX_LATCH2_LOW *((int*)0X900A0000)=0x00 //扩展IO 2 置高 #define EX_LATCH3_HIGH *((int*)0X900B0000)=0x00 //扩展IO 3置低 #define EX_LATCH3_LOW *((int*)0X900C0000)=0x00 //扩展IO 2 置高 #define EX_LATCH4_HIGH *((int*)0X900D0000)=0x00 //扩展IO 4置低 #define EX_LATCH4_LOW *((int*)0X900E0000)=0x00 //扩展IO 2 置高 //////////////////////////////////////////////////////////////// //多路选通 #define TXD_TO_TXDOUT1 *((int*)0X90200000)=0x00 //16c550的串行输出到第一路232 #define TXD_TO_TXDOUT2 *((int*)0X90210000)=0x00 //16c550的串行输出到第二路232 #define TXD_TO_RS485DI *((int*)0X90220000)=0x00 //16c550的串行输出到485 #define RXDIN1_TO_RXD *((int*)0X90230000)=0x00 //第一路232输出到16c550的串行输入 #define RXDIN2_TO_RXD *((int*)0X90240000)=0x00 //第二路232输出到16c550的串行输入 #define RS485RO_TO_RXD *((int*)0X90250000)=0x00 //485输出到16c550的串行输入 ////////////////////////////////////////////////////////////////// //LED #define LED 0x90202018 #define LED1_ON *((int*)0x90202018)|=0x80000000 #define LED1_OFF *((int*)0x90202018)&=0x70000000 #define LED2_ON *((int*)0x90202018)|=0x40000000 #define LED2_OFF *((int*)0x90202018)&=0xB0000000 #define LED3_ON *((int*)0x90202018)|=0x20000000 #define LED3_OFF *((int*)0x90202018)&=0xD0000000 #define LED4_ON *((int*)0x90202018)|=0x10000000 #define LED4_OFF *((int*)0x90202018)&=0xE0000000 #define LED_ALL_ON *((int*)0x90202018)=0xff000000 #define LED_ALL_OFF *((int*)0x90202018)=0x00000000 ///////////////////////////////////////////////////////////////// //常用常数 #define LONG_BUAA 116 //北航的经度 #define LAT_BUAA 39 //北航的纬度 #define Wie 0.0041667 //地球自转角速度 #define PI 3.1415926 //PI #define uchar unsigned char #define FLASHMAP1ADDRESS 0x90000000 //flash首地址 |
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