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//
// TMDX ALPHA RELEASE
// Intended for product evaluation purposes
//
//###########################################################################
//
// FILE: Example_28xGpio_input.c
//
// TITLE: DSP28 Device Getting Started Program.
// In this test, 8 bits of a GPIO Port are configured as outputs
// and 8 bits of the same port are configured as inputs. The pins
// configured as outputs need to be externally looped back to the
// pins configured as inputs. The output data is read back on the
// input pins. These tests are repeated for various qualifier
// values and for GPIO ports A, B and F.
//
// Similar tests could be written for GPIO ports D, E and G.
// Tests for ports A, D and F are being called by seperate functions
// An external loopback has to be established, before a testcase for
// a given port is executed.
// Refer to the .ebss space for global variables for test status
// If PASS_flag = 0xDOBE then all tests have passed.
// If PASS_flag = 0xDEAD then some tests have failed.
// Tests are self validating. If a test passes, Test_status array
// will have Test code 0x00xx. If this array has 0xDEAD, the test
// has failed.
// Final Break-point = 0xxxxx, PASS_flag is located at 0xxxxx
// Test #1:
// Configure Upper 8 bits of Port A as outputs and lower 8 bits as inputs
// Loop back bits [15:8] to bits [7:0]
// Input Qualifier = 0 (Don't set any input qualifier)
// Needs a delay between CLEAR/SET/TOGGLE instruction.
// This test is run 4 times.
// Test #2:
// Configure Upper 8 bits of Port A as inputs and lower 8 bits as outputs
// Loop back bits [7:0] to bits [15:8]
// Input Qualifier = 0 (Don't set any input qualifier)
// Needs a delay between CLEAR/SET/TOGGLE instruction.
// This test is run 4 times.
// Test #3:
// Configure Upper 8 bits of Port A as outputs and lower 8 bits as inputs
// Loop back bits [15:8] to bits [7:0]
// Input Qualifier, QUALVAL = 1
// Needs a delay between CLEAR/SET/TOGGLE instruction.
// For a pass, the delay must be >= ( 6 * 2 * QUALVAL ) CPUCLK cycles
// i.e the delay must be >= 12 CPUCLK cyles
// This test is run 4 times.
// Test #4:
// Configure Upper 8 bits of Port B as outputs and lower 8 bits as inputs
// Loop back bits [15:8] to bits [7:0]
// Input Qualifier, QUALVAL = 2
// Needs a delay between CLEAR/SET/TOGGLE instruction.
// For a pass, the delay must be >= 24 CPUCLK cycles
// This test is run 4 times.
// Test #5:
// Configure Upper 7 bits of Port F as outputs and lower 8 bits as inputs
// Loop back bits [14:8] to bits [6:0], also loopback bit 8 to bit 7
// Needs a delay between CLEAR/SET/TOGGLE instruction.
// This test is run 4 times.
//###########################################################################
//
// Ver | dd mmm yyyy | Who | Description of changes
// =====|=============|======|===============================================
// 0.58| 04 Jul 2002 |T.N.P | EzDSP Alpha Release
//###########################################################################
#include "DSP28_Device.h"
#include "DSP28_Globalprototypes.h"
// Prototype statements for functions found within this file.
// interrupt void ISRTimer2(void);
void delay_loop(void);
void Gpio_select(void);
void error(int);
void program_stop();
void Gpio_PortA(void);
void Gpio_PortB(void);
void Gpio_PortF(void);
void Gpio_PortDEG(void);
unsigned int var1 = 0;
unsigned int var2 = 0;
unsigned int var3 = 0;
unsigned int test_count = 0;
unsigned int Test_flag = 0;
unsigned int Test_var = 0;
unsigned int Test_status[32];
unsigned int PASS_flag = 0;
void main(void)
{
// Step 1. Initialize System Control registers, PLL, WatchDog, Clocks to default state:
// This function is found in the DSP28_SysCtrl.c file.
InitSysCtrl();
// Step 2. Select GPIO for the device or for the specific application:
// This function is found in the DSP28_Gpio.c file.
// InitGpio(); skip this as this is for GPIO test
// Step 3. Initialize PIE vector table:
// The PIE vector table is initialized with pointers to shell Interrupt
// Service Routines (ISR). The shell routines are found in DSP28_DefaultIsr.c.
// Insert user specific ISR code in the appropriate shell ISR routine in
// the DSP28_DefaultIsr.c file.
// Disable and clear all CPU interrupts:
DINT;
IER = 0x0000;
IFR = 0x0000;
// Initialize Pie Control Registers To Default State:
// This function is found in the DSP28_PieCtrl.c file.
InitPieCtrl();
// Initialize the PIE Vector Table To a Known State:
// This function is found in DSP28_PieVect.c.
// This function populates the PIE vector table with pointers
// to the shell ISR functions found in DSP28_DefaultIsr.c.
InitPieVectTable();
// Step 4. Initialize all the Device Peripherals to a known state:
// This function is found in DSP28_InitPeripherals.c
// InitPeripherals(); skip this for GPIO tests
// Step 5. User specific functions, Reassign vectors (optional), Enable Interrupts:
// EALLOW; // This is needed to write to EALLOW protected registers
// PieVectTable.TINT2 = &ISRTimer2;
// EDIS; // This is needed to disable write to EALLOW protected registers
// Tests #1, #2, #3
Gpio_PortA();
// Test #4
Gpio_PortB();
// Test #5
Gpio_PortF();
program_stop();
// Step 6. IDLE loop. Just sit and loop forever (optional):
// for(;;);
}
// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:
// If local ISRs are used, reassign vector addresses in vector table as
// shown in Step 5
void Gpio_PortA(void)
{
// GPIO Test #1:
// Configure Upper 8 bits of Port A as outputs and lower 8 bits as inputs
// Loop back bits [15:8] to bits [7:0]
// Don't set any input qualifier
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0xFF00; // sets GPIO 15-8 DIR as outputs, 7-0 DIR as inputs
var3= 0x0000; // Don't set any input qualifier
Gpio_select();
test_count = 0;
Test_status[Test_var] = 0x0001;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
while (test_count < 4) { // repeat the tests 4 times
GpioDataRegs.GPACLEAR.all = 0xFF00; // Test Clear
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPASET.all = 0x5500; // Test Set
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x5555 ) error(1);
GpioDataRegs.GPATOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0xAAAA ) error(1);
test_count++;
}
Test_var++;
// End of Test #1
// GPIO Test #2:
// Configure Upper 8 bits of Port as inputs and lower 8 bits as outputs
// Loop back bits [7:0] to bits [15:8]
// Don't set any input qualifier
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0x00FF; // sets GPIO 15-8 DIR as inputs, 7-0 DIR as outputs
var3= 0x0000; // Don't set any input qualifier
Gpio_select();
test_count = 0;
Test_status[Test_var] = 0x0002;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
while (test_count < 4) { // repeat the tests 4 times
GpioDataRegs.GPACLEAR.all = 0x00FF; // Test Clear
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPASET.all = 0x00AA; // Test Set
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0xAAAA ) error(1);
GpioDataRegs.GPATOGGLE.all = 0x0055; // Test Toggle
asm(" RPT #5 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0xFFFF ) error(1);
test_count++;
}
Test_var++;
// End of Test #2
// GPIO Test #3:
// Configure Upper 8 bits of Port as outputs and lower 8 bits as inputs
// Loop back bits [15:8] to bits [7:0]
// Set input qualifier to 0x0001
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0xFF00; // sets GPIO 15-8 DIR as outputs, 7-0 as inputs.
var3= 0x0001; // Set input qualifier to 1
Gpio_select();
// Test #3A: Set delay so that the input gets rejected.
// delay must be < ( 6 * 2 * QUALVAL ) CPUCLK cycles
Test_status[Test_var] = 0x0003;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) { // repeat the tests 4 times
GpioDataRegs.GPBSET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPACLEAR.all = 0xFF00; // Test Clear
asm (" RPT #14 || NOP"); // Delay < ( 6 * 2 ) CPUCLK cycles
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag == 0x0000 ) error(1);
GpioDataRegs.GPASET.all = 0x5500; // Test Set
asm(" RPT #14 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag == 0x5555 ) error(1);
GpioDataRegs.GPATOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #14 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag == 0xAAAA ) error(1);
test_count++;
}
Test_var++;
// Test #3B: Set delay so that the input is qualified successfully
// delay must be >= ( 6 * 2 * QUALVAL ) CPUCLK cycles
Test_status[Test_var] = 0x0004;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) { // repeat the tests 4 times
GpioDataRegs.GPASET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPACLEAR.all = 0xFF00; // Test Clear
asm (" RPT #16 || NOP"); // Delay = (6 * 2 * 1) CPUCLK cycles
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPASET.all = 0x5500; // Test Set
asm(" RPT #16 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0x5555 ) error(1);
GpioDataRegs.GPATOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #16 ||NOP");
Test_flag = GpioDataRegs.GPADAT.all;
if ( Test_flag != 0xAAAA ) error(1);
test_count++;
}
Test_var++;
} // End of Test #3
void Gpio_PortB(void)
{
// GPIO Test #4:
// Configure Upper 8 bits of Port B as outputs and lower 8 bits as inputs
// Loop back bits [15:8] to bits [7:0]
// Set input qualifier to 0x0002
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0xFF00; // sets GPIO 15-8 DIR as outputs, 7-0 as inputs.
var3= 0x0002; // Set input qualifier to 2
Gpio_select();
// Test #4A: Set delay so that the input gets rejected.
// Delay must be < ( 6 * 2 * QUALVAL ) CPUCLK cycles
Test_status[Test_var] = 0x0005;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) { // repeat the tests 4 times
GpioDataRegs.GPBSET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPBCLEAR.all = 0xFF00; // Test Clear
asm (" RPT #24 || NOP"); // Delay < (6 * 2 * 2) CPUCLK cycles
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag == 0x0000 ) error(1);
GpioDataRegs.GPBSET.all = 0x5500; // Test Set
asm(" RPT #24 ||NOP");
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag == 0x5555 ) error(1);
GpioDataRegs.GPBTOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #24 ||NOP");
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag == 0xAAAA ) error(1);
test_count++;
}
Test_var++;
// Test #4B: Set delay so that the input is qualified successfully
// Delay must be >= ( 6 * 2 * QUALVAL ) CPUCLK cycles
Test_status[Test_var] = 0x0006;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) { // repeat the tests 4 times
GpioDataRegs.GPBSET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPBCLEAR.all = 0xFF00; // Test Clear
asm (" RPT #29 || NOP"); // Delay = (6 * 2 * 2) CPUCLK cycles
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPBSET.all = 0x5500; // Test Set
asm(" RPT #29 ||NOP");
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag != 0x5555 ) error(1);
GpioDataRegs.GPBTOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #29 ||NOP");
Test_flag = GpioDataRegs.GPBDAT.all;
if ( Test_flag != 0xAAAA ) error(1);
test_count++;
}
Test_var++;
} // End of Test #4
void Gpio_PortF(void)
{
// GPIO Test #5:
// Configure Upper bits [14:8] of Port F as outputs and bits [7:0] as inputs
// Loop back bits [14:8] to bits [6:0], also loopback bit #8, to bit #7
var1= 0x0000; // sets GPIO Muxs as I/Os
var2= 0xFF00; // sets GPIO 14-8 DIR as outputs, 7-0 as inputs.
Gpio_select();
Test_status[Test_var] = 0x0007;
Test_var++;
Test_status[Test_var] = 0xD0BE; // Set the default value of status
// to "PASSED"
test_count = 0;
while (test_count < 4) { // repeat the tests 4 times
GpioDataRegs.GPFSET.all = 0xFF00;
delay_loop();
GpioDataRegs.GPFCLEAR.all = 0xFF00; // Test Clear
asm (" RPT #6 || NOP");
Test_flag = GpioDataRegs.GPFDAT.all;
if ( Test_flag != 0x0000 ) error(1);
GpioDataRegs.GPFSET.all = 0x5500; // Test Set
asm(" RPT #6 || NOP");
Test_flag = GpioDataRegs.GPFDAT.all;
if ( Test_flag != 0x55D5 ) error(1);
GpioDataRegs.GPFTOGGLE.all = 0xFF00; // Test Toggle
asm(" RPT #6 || NOP");
Test_flag = GpioDataRegs.GPFDAT.all;
if ( Test_flag != 0x2A2A ) error(1);
test_count++;
}
Test_var++;
} // End of Test #5
void delay_loop()
{
short i;
for (i = 0; i < 1000; i++) {}
}
void Gpio_select(void)
{
EALLOW;
GpioMuxRegs.GPAMUX.all=var1; // Configure MUXs as digital I/Os or
GpioMuxRegs.GPBMUX.all=var1; // peripheral I/Os
GpioMuxRegs.GPDMUX.all=var1;
GpioMuxRegs.GPFMUX.all=var1;
GpioMuxRegs.GPEMUX.all=var1;
GpioMuxRegs.GPGMUX.all=var1;
GpioMuxRegs.GPADIR.all=var2; // GPIO PORTs as output
GpioMuxRegs.GPBDIR.all=var2; // GPIO DIR select GPIOs as output
GpioMuxRegs.GPDDIR.all=var2;
GpioMuxRegs.GPEDIR.all=var2;
GpioMuxRegs.GPFDIR.all=var2;
GpioMuxRegs.GPGDIR.all=var2;
GpioMuxRegs.GPAQUAL.all=var3; // Set GPIO input qualifier values
GpioMuxRegs.GPBQUAL.all=var3;
GpioMuxRegs.GPDQUAL.all=var3;
GpioMuxRegs.GPEQUAL.all=var3;
EDIS;
}
void error (int ErrorFlag)
{
PASS_flag = 0xDEAD; // Test case failed
Test_status[Test_var] = 0xDEAD; // Sub-test failed
return;
}
void program_stop()
{
/* All tests are done */
if(PASS_flag !=0)
PASS_flag=0xDEAD; // Test code exit here..
else
PASS_flag=0xD0BE; // Test code exit he
// end all tests
asm(" ESTOP0"); // Done!
for(;;) { } // Dummy loop Wait for Ever
}
//===========================================================================
// No more.
//===========================================================================
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