[ModelSim中增加FPGA(Altera/Xilinx)库(免手动编译)]的xilinx追加说明

3，将ModelSim XE下的xilinx子目录拷贝到普通ModelSim下。

4，在普通ModelSim下的modelsim.ini文件中的[Library]到[vcom]之间加入如下代码：

;Xilinx

; VHDL Section

unisim = $MODEL_TECH/../xilinx/vhdl/unisim

simprim = $MODEL_TECH/../xilinx/vhdl/simprim

xilinxcorelib = $MODEL_TECH/../xilinx/vhdl/xilinxcorelib

aim = $MODEL_TECH/../xilinx/vhdl/aim

pls = $MODEL_TECH/../xilinx/vhdl/pls

cpld = $MODEL_TECH/../xilinx/vhdl/cpld

; Verilog Section

unisims_ver = $MODEL_TECH/../xilinx/verilog/unisims_ver

uni9000_ver = $MODEL_TECH/../xilinx/verilog/uni9000_ver

simprims_ver = $MODEL_TECH/../xilinx/verilog/simprims_ver

xilinxcorelib_ver = $MODEL_TECH/../xilinx/verilog/xilinxcorelib_ver

aim_ver = $MODEL_TECH/../xilinx/verilog/aim_ver

cpld_ver = $MODEL_TECH/../xilinx/verilog/cpld_ver

其它的和增加altera库方法相同。