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  [图文]NS系统测试接如系统解决方案           ★★★ 【字体:
NS系统测试接如系统解决方案
作者:NS    文章来源:本站    点击数:    更新时间:2007-3-19    


Complex circuit board designs typically use multiple IEEE 1149.1 (JTAG) access points for FPGA configuration, Flash programming, emulation, and test. By incorporating Nationals JTAG mux products, multiple JTAG headers can be eliminated and isolation of components can be improved. The JTAG mux can further extend the utility of the JTAG bus by allowing a multi-drop JTAG configuration in a backplane environment. This capability provides access to advanced features across multiple cards at higher levels of system integration, such as high-speed interconnect test when using Nationals innovative LVDS with JTAG accessible at-speed BIST.
Component Highlights

*Multidrop JTAG Mux - Simplifies access to multiple JTAG chains, and enables multi-drop JTAG access.

*Embedded JTAG Master - Converts Parallel bus data to JTAG for embedded vector delivery.

*LVDS SerDes - JTAG accessible at-speed BIST verifies high-speed LVDS interconnect integrity.

1 LVDS SerDes With IEEE 1149.1
DS92LV1260TUJB
SCAN921023SLC
SCAN921023SLCX
2 Multidrop JTAG Multiplexer
SCANSTA101SM
SCANSTA101SMX
SCANSTA112SM
3 Embedded JTAG Master
SCANSTA101SM
SCANSTA101SMX
SCANSTA112SM
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