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Cypress公司的CY7C603xx系列是低压enCoRe III PSoC器件,采用功能强大的哈佛架构,M8C处理器的速度高达12MHz,工作电压2.4V-3.6V,具有可配置的外设如8位定时器,计数器和PWM,全双工主或从SPI,10位ADC,8位SAR ADC和比较器,闪存程序存储器,SRAM数据存储器和可配置的I/O口,主要用在无线鼠标,无线游戏手柄, PlayStation® 2有线游戏手柄以及各种低压8位MCU应用. 本文介绍了CY7C603xx 主要特性,方框图, 数字系统方框图和模拟系统方框图,以及WirelessUSB LP VoIP演示套件主要特性, VOIP遥控板电路图, DIV板电路图和LP Dongle III板电路图与相应的材料清单(BOM).
The enCoRe III Low Voltage (enCoRe III LV) CY7C603xx device is based on the flexible PSoC® architecture. This supports a simple set of peripherals that can be configured to match the needs of each application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable IO are included in a range of convenient pinouts.
CY7C603xx 主要特性:
■ Powerful Harvard Architecture Processor
❐ M8C Processor Speeds to 12 MHz
❐ Low Power at High Speed
❐ 2.4V to 3.6V Operating Voltage
❐ Operating Voltages down to 1.0V using On-Chip Switch Mode Pump (SMP)
❐ Commercial Temperature Range: 0℃ to +70℃
■ Configurable Peripherals
❐ 8-Bit Timers, Counters, and PWM
❐ Full Duplex Master or Slave SPI
❐ 10-Bit ADC
❐ 8-Bit Successive Approximation ADC
❐ Comparator
■ Flexible On-Chip Memory
❐ 8K Flash Program Storage 50,000 Erase/Write Cycles
❐ 512 Bytes SRAM Data Storage
❐ In-System Serial Programming (ISSP)
❐ Partial Flash Updates
❐ Flexible Protection Modes
❐ EEPROM Emulation in Flash
■ Complete Development Tools
❐ Free Development Software (PSoC Designer™)
❐ Full-Featured, In-Circuit Emulator and Programmer
❐ Complex Breakpoint Structure
❐ 128K Trace Memory
■ Precision, Programmable Clocking
❐ Internal ±2.5% 24 and 48 MHz Oscillator
❐ Internal Oscillator for Watchdog and Sleep
■ Programmable Pin Configurations
❐ 10 mA Drive on all GPIO
❐ Pull Up, Pull Down, High Z, Strong, or Open Drain Drive Modes on all GPIO
❐ Up to 8 Analog Inputs on GPIO
❐ Configurable Interrupt on all GPIO
■ Versatile Analog Mux
❐ Common Internal Analog Bus
❐ Simultaneous Connection of IO Combinations
■ Additional System Resources
❐ I2C Master, Slave and Multi-Master to 400 kHz
❐ Watchdog and Sleep Timers
❐ User-configurable Low Voltage Detection
❐ Integrated Supervisory Circuit
❐ On-Chip Precision Voltage Reference
CY7C603xx 应用:
■ Wireless mice
■ Wireless gamepads
■ Wireless presenter tools
■ Wireless keypads
■ PlayStation® 2 wired gamepads
■ PlayStation 2 bridges for wireless gamepads
❐ Applications requiring a cost effective low voltage 8-bit microcontroller.
 图1.CY7C603xx方框图
This architecture enables the user to create customized peripheral configurations that match the requirements of each individual application. A fast CPU, Flash program memory, SRAM data memory, and configurable IO are included in both 28-pin SSOP and 32-pin QFN packages.
The enCoRe III LV architecture consists of four main areas: the enCoRe III LV Core, the System Resources, Digital System, and Analog System. Configurable global bus resources allow combining all the device resources into a complete custom system. Each enCoRe III LV device supports a limited set of digital and analog peripherals.
Depending on the package, up to 28 general purpose IOs (GPIOs) are also included. The GPIOs provide access to the global digital and analog interconnects.
enCoRe III LV Core
The enCoRe III LV core is a powerful engine that supports a rich feature set. It encompasses SRAM for data storage, an interrupt controller, sleep and watchdog timers, and IMO (internal main oscillator) and ILO (internal low-speed oscillator).
The CPU core, called the M8C, is a powerful processor with speeds up to 12 MHz. The M8C is a four MIPS 8-bit Harvard architecture microprocessor. The core includes a CPU, memory, clocks, and configurable GPIO (General Purpose IO).
System Resources provide additional capability, such as digital clocks to increase flexibility, I2C functionality for implementing an I2C master, slave, multi-master, an internal voltage reference that provides an absolute value of 1.3V to a number of subsystems, a switch mode pump (SMP) that generates normal operating voltages off a single battery cell, and various system resets supported by the M8C.
The Digital System
The digital system consists of 4 digital enCoRe III LV blocks. Each block is an 8-bit resource. Digital peripheral configurations include the following:
■ PWM usable as timer or counter
■ SPI master and slave
■ I2C slave and multi-master
■ CMP
■ ADC10
■ SARADC
The digital blocks may be connected to any GPIO through a series of global buses that can route any signal to any pin. The buses also allow for signal multiplexing and for performing logic operations. This configurability frees your designs from the constraints of a fixed peripheral controller.
 图2.CY7C603xx数字系统方框图
The Analog System
The analog system consists of two configurable blocks. Analog peripherals are very flexible and may be customized to support specific application requirements. Some of the common analog functions for this device (available as user modules) are:
■ Analog-to-digital converters (single with 8-bit resolution)
■ Pin-to-pin comparators
■ Single-ended comparators with absolute (1.3V) reference
■ 1.3V reference (as a System Resource)
Analog blocks are provided in columns of two, which includes one CT (Continuous Time - ACE00 or ACE01) and one SC (Switched Capacitor - ASE10 or ASE11) blocks.
 图3.CY7C603xx模拟系统方框图
WirelessUSB LP VoIP演示套件
WirelessUSB LP VoIP demo kit provides a smart implementation of low power, low cost, duplex wireless headset to a single wireless receiver. The kit combines Cypress’s WirelessUSB LP radio system-on-chip and enCoRe(TM) (Enhanced Component Reduction) micro controllers with Winbond’s W681360, 13 bit low power CODEC to implement clean signal quality and production-ready, 2.4GHz wireless VoIP headset system.
WirelessUSB LP VoIP演示套件包括:
WirelessUSB Headset Board - Innovative dual antenna design for range and robustness. Uses Cypress WirelessUSB LP (CYRF6936), Wireless enCoRe II (CY7C60323) flash MCU and Winbond (W681360) 3V Single-Channel CODEC.
WirelessUSB Full-Speed USB Bridge - Simple and small formfactor bridge. Uses WirelesUSB LP (CYRF6936) and enCoRe III (CY7C64215) USB flash MCU
WirelessUSB LP VoIP Demo Kit CD-ROM - Provides kit documentation, hardware schematics, bill of materials and firmware for Wireless VoIP headset design.
Other - Mono Headset, Battery charger and USB extension cable for the bridge.
WirelessUSB LP VoIP演示套件主要特性:
Headset with antenna diversity for maximizing range and robustness
Duplex voice sampling at 8KHz with clean signal quality
Over 8hrs of talk time between re-charging
 图4.WirelessUSB LP VoIP演示套件外形图
 图5.演示套件的VOIP遥控板电路图
 图6.演示套件的DIV板电路图
 图7.演示套件的LP Dongle III板电路图
VOIP遥控板材料清单见:
VOIP遥控板材料清单.xls
VOIP DIV板材料清单见:
VOIP DIV板材料清单.xls
LP Dongle III板材料清单见:
LP Dongle III板材料清单.xls
详情请见: http://www.cypress.com/?docID=26309
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