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| Altera PCI Express到DDR2 SDRAM 参考设计 | |||||
作者：Altera 文章来源：本站 点击数： 更新时间：2007-4-2  |
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Altera offers a PCI Express to DDR2 SDRAM reference design that demonstrates the operation of Alteras PCI Express (PCIe) MegaCore® product. This reference design provides an interface between the Altera® PCIe MegaCore function and a 64-bit, 256-Mbyte DDR2 SDRAM memory that enables access to external DDR2 SDRAM memory through the PCIe bus. It also represents an example of a typical user application that interfaces to the system side of the Altera PCIe MegaCore function. Features Supports PCIe root complex to PCIe end point memory read and write transactions Supports PCIe end point to PCIe root complex direct memory access (DMA) read and write transactions Demonstrates how to use the PCIe MegaCore function Demonstrates how to use the DDR2 SDRAM Controller MegaCore function Uses the dual-port FIFO buffer function from the library of parameterized modules (LPM) Uses the Stratix® II GX FPGA with internal transceivers Demonstrated Altera Technology Stratix II GX FPGAs with transceiver technology Altera PCIe MegaCore function Altera DDR2 SDRAM Controller MegaCore function PCI Express到DDR2 SDRAM 参考设计方框图 
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